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注释鸿蒙内核源码
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提交 5d3039f7 编写于 作者: 鸿蒙内核源码分析's avatar 鸿蒙内核源码分析
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注解异常分发汇编代码 

    百万汉字注解 + 百篇博客分析 => 挖透鸿蒙内核源码
    https://weharmony.gitee.io
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arch/arm/arm/src/include/asm.h
浏览文件 @ 5d3039f7
/*
* Copyright (c) 2013-2019, Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __ASM_H
#define __ASM_H
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
#define FUNCTION(x) .global x; .text; .code 32; x:
#define MPIDR_CPUID_MASK 0xFFU
/*
* ------------------------------------------
* stackTop | cpu n | ... | cpu 1 | cpu 0 | stackBottom
* ------------------------------------------
* | stackSize | ... | stackSize | stackSize |
*/
.macro EXC_SP_SET stackBottom, stackSize, reg0, reg1
mrc p15, 0, \reg0, c0, c0, 5
and \reg0, \reg0, #MPIDR_CPUID_MASK /* get cpu id */
mov \reg1, #\stackSize
mul \reg1, \reg1, \reg0 /* calculate current cpu stack offset */
ldr \reg0, =\stackBottom
sub \reg0, \reg0, \reg1 /* calculate current cpu stack bottom */
mov sp, \reg0 /* set sp */
.endm
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* __ASM_H */
/*
* Copyright (c) 2013-2019, Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __ASM_H
#define __ASM_H
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
#define FUNCTION(x) .global x; .text; .code 32; x:
#define MPIDR_CPUID_MASK 0xFFU
/*
* ------------------------------------------
* stackTop | cpu n | ... | cpu 1 | cpu 0 | stackBottom
* ------------------------------------------
* | stackSize | ... | stackSize | stackSize |
*/
.macro EXC_SP_SET stackBottom, stackSize, reg0, reg1
mrc p15, 0, \reg0, c0, c0, 5 @获取CPU信息
and \reg0, \reg0, #MPIDR_CPUID_MASK /* get cpu id */ @获取当前运行CPUID
mov \reg1, #\stackSize @reg1 记录 栈大小
mul \reg1, \reg1, \reg0 /* calculate current cpu stack offset */ @计算当前CPU栈的偏移位置
ldr \reg0, =\stackBottom @reg0 记录栈底
sub \reg0, \reg0, \reg1 /* calculate current cpu stack bottom */ @相减得到栈顶
mov sp, \reg0 /* set sp */ @设置SP,将SP移到栈顶
.endm
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* __ASM_H */
arch/arm/arm/src/los_hw_exc.S
浏览文件 @ 5d3039f7
......@@ -277,9 +277,9 @@ _osExceptAddrAbortHdl: @地址异常处理
_osExceptFiqHdl: @快中断异常处理
SUB LR, LR, #4 @ LR offset to return from this exception: -4.
STMFD SP, {R0-R7} @ Push working registers.
@ R0~R7入栈保存
MOV R0, #OS_EXCEPT_FIQ @ Set exception ID to OS_EXCEPT_FIQ.
@ 设置参数异常类型,将作为参数传给_osExceptDispatch
B _osExceptDispatch @ Branch to global exception handler.
_osExcPageFault: @缺页异常处理函数
......@@ -328,41 +328,43 @@ _osExcPageFault: @缺页异常处理函数
@ Parameter : R0 Exception Type 异常类型
@ Regs Hold : R3 Exception`s CPSR 发生异常时的CPSR值 @note_thinking 鸿蒙官方的注释错了,应该是Regs Hold: R2
_osExceptDispatch: @处理异常分发
MRS R2, SPSR @ Save CPSR before exception.
MOV R1, LR @ Save PC before exception.
MRS R2, SPSR @ Save CPSR before exception.先用R2保存CPSR
MOV R1, LR @ Save PC before exception. 在用R1保存PC寄存器
SUB R3, SP, #(8 * 4) @ Save the start address of working registers.
@ 保存工作寄存器的起始地址,R0~R7八个寄存器
MSR CPSR_c, #(CPSR_INT_DISABLE | CPSR_SVC_MODE) @ Switch to SVC mode, and disable all interrupts
MOV R5, SP
EXC_SP_SET __exc_stack_top, OS_EXC_STACK_SIZE, R6, R7
STMFD SP!, {R1} @ Push Exception PC
STMFD SP!, {LR} @ Push SVC LR
STMFD SP!, {R5} @ Push SVC SP
STMFD SP!, {R8-R12} @ Push original R12-R8,
@ 切换到SVC模式,屏蔽掉所有中断
MOV R5, SP @ R5 = SP ,保存SP位置
EXC_SP_SET __exc_stack_top, OS_EXC_STACK_SIZE, R6, R7 @ 切换到当前CPU的SVC模式栈处理
STMFD SP!, {R1} @ Push Exception PC 保存上一个工作模式的PC
STMFD SP!, {LR} @ Push SVC LR 保存上一个工作模式的LR
STMFD SP!, {R5} @ Push SVC SP 保存上一个工作模式的SP
STMFD SP!, {R8-R12} @ Push original R12-R8,保存上一个工作模式的R8-R12
LDMFD R3!, {R4-R11} @ Move original R7-R0 from exception stack to original stack.
STMFD SP!, {R4-R11}
@ 将保存在上一个工作模式的R0~R7取出
STMFD SP!, {R4-R11} @ 将上一个工作模式的R0~R7保存到新的栈中
STMFD SP!, {R2} @ Push task`s CPSR (i.e. exception SPSR).
@ 任务的CPSR入栈
CMP R0, #OS_EXCEPT_DATA_ABORT @是数据异常吗?
BNE 1f @不是跳到 锚点1处
MRC P15, 0, R8, C6, C0, 0 @R8=C6(内存失效的地址) 0(访问数据失效)
MRC P15, 0, R9, C5, C0, 0 @R9=C5(内存失效的状态) 0(无效整个指令cache)
B 3f @跳到锚点3处执行
1: CMP R0, #OS_EXCEPT_PREFETCH_ABORT @是预取异常吗?
BNE 2f @不是跳到 锚点2处
BNE 2f @不是,跳到 锚点2: 处运行
MRC P15, 0, R8, C6, C0, 2 @R8=C6(内存失效的地址) 2(访问指令失效)
MRC P15, 0, R9, C5, C0, 1 @R9=C5(内存失效的状态) 1(虚拟地址)
B 3f @跳到锚点3处执行
2: MOV R8, #0
MOV R9, #0
3: AND R2, R2, #CPSR_MASK_MODE
CMP R2, #CPSR_USER_MODE @ User mode
BNE 4f @不是用户模式
STMFD SP, {R13, R14}^ @ save user mode sp and lr
B 3f @直接跳到 锚点3: 处执行
2: MOV R8, #0 @R8=0
MOV R9, #0 @R9=0
3: AND R2, R2, #CPSR_MASK_MODE @获取当前工作模式
CMP R2, #CPSR_USER_MODE @ User mode 是否为用户模式
BNE 4f @不是用户模式,跳到 锚点4: 处运行
STMFD SP, {R13, R14}^ @ save user mode sp and lr 保存用户模式的SP和LR
4:
SUB SP, SP, #(4 * 2) @sp=sp-(4*2)
SUB SP, SP, #(4 * 2) @sp=sp-(4*2) 指向真正的栈顶
_osExceptionSwi: @软中断的处理,系统调用就是由软中断实现的
MOV R1, SP @ The second argument to the exception
......
zzz/git/push.sh
浏览文件 @ 5d3039f7
git add -A
git commit -m '(异常接管篇) | 社会很单纯,复杂的是人
git commit -m '注解异常分发汇编代码
百万汉字注解 + 百篇博客分析 => 挖透鸿蒙内核源码
https://weharmony.gitee.io
'
......
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