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上下文切换汇编代码注解 

    百万汉字注解 + 百篇博客分析 => 挖透鸿蒙内核源码
    https://weharmony.gitee.io
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README.md
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百万汉字注解 >> 精读内核源码,中文注解分析, 深挖地基工程,大脑永久记忆,四大码仓每日同步更新[< gitee ](https://gitee.com/weharmony/kernel_liteos_a_note)[| github ](https://github.com/kuangyufei/kernel_liteos_a_note)[| csdn ](https://codechina.csdn.net/kuangyufei/kernel_liteos_a_note)[| coding >](https://weharmony.coding.net/public/harmony/kernel_liteos_a_note/git/files)
百篇博客分析 >> 故事说内核,问答式导读,生活式比喻,表格化说明,图形化展示,多站点每日同步更新[< oschina ](https://my.oschina.net/u/3751245/blog/4626852)[| csdn ](https://blog.csdn.net/kuangyufei/article/details/108727970)[| weharmony >](https://weharmony.gitee.io/)
百篇博客分析 >> 故事说内核,问答式导读,生活式比喻,表格化说明,图形化展示,主流站点定期更新中[< oschina ](https://my.oschina.net/u/3751245/blog/4626852)[| csdn ](https://blog.csdn.net/kuangyufei/article/details/108727970)[| weharmony >](https://weharmony.gitee.io/)
---
## **百万汉字注解**
**[kernel\_liteos\_a_note](https://gitee.com/weharmony/kernel_liteos_a_note)** 是在鸿蒙官方开源项目 **[kernel\_liteos\_a](https://gitee.com/openharmony/kernel_liteos_a)** 基础上给源码加上中文注解的版本,目前几大核心模块加注已基本完成, **整体加注完成70%**
**[kernel\_liteos\_a_note](https://gitee.com/weharmony/kernel_liteos_a_note)** 是在鸿蒙官方开源项目 **[kernel\_liteos\_a](https://gitee.com/openharmony/kernel_liteos_a)** 基础上给源码加上中文注解的版本
### **为何要精读内核源码?**
* 每个码农,学职生涯,都应精读一遍内核源码.是浇筑计算机知识大厦的地基工程，地基纵深坚固程度，决定了大厦能盖多高。为何一定要精读?因为内核代码本身并不太多，都是浓缩的精华，精读就是让各个知识点高频出现，闪爆大脑，短时间内容易结成一张高浓度，高密度的底层网，形成永久大脑记忆。跟骑单车一样，一旦学会，即便多年不骑，照样跨上就走，游刃有余。
* 在每位码农的学职生涯,都应精读一遍内核源码.以浇筑好计算机知识大厦的地基，地基纵深的坚固程度，很大程度能决定了未来大厦能盖多高。为何一定要精读细品呢?
* 因为内核代码本身并不太多，都是浓缩的精华，精读是让各个知识点高频出现，不孤立成点状记忆,让各点相连成面,刻意练习,闪爆大脑，如此短时间内容易结成一张高浓度，高密度的底层网，不断训练大脑肌肉记忆,将这些地基信息从临时记忆区转移到永久记忆区。跟骑单车一样，一旦学会，即便多年不骑，照样跨上就走，游刃有余。
### **2020/9/10**
### **热爱是所有的理由和答案**
+ 因大学时阅读 `linux 2.6` 内核痛苦经历,一直有个心愿,如何让更多对内核感兴趣的同学减少阅读时间,加速对计算机系统级的理解,而不至于过早的放弃.但因过程种种,多年一直没有行动,基本要放弃这件事了. 恰逢 `2020/9/10` 鸿蒙正式开源,重新激活了多年的心愿,就有那么点一发不可收拾了. :|P
* 因大学时阅读 `linux 2.6` 内核痛并快乐的经历,一直有个心愿,如何让更多对内核感兴趣的朋友减少阅读时间,加速对计算机系统级的理解,而不至于过早的放弃.但因过程种种,多年一直没有行动,基本要放弃这件事了. 恰逢 **2020/9/10** 鸿蒙正式开源,重新激活了多年的心愿,就有那么点一发不可收拾了.
* 到今天 **2021/3/10** 刚好半年, 对内核源码的注解已完成了 **70%** ,对内核源码的博客分析已完成了**40篇**, 每天都很充实,很兴奋,连做梦内核代码都在往脑海里鱼贯而入.如此疯狂的做一件事还是当年谈恋爱的时候, 只因热爱, 热爱是所有的理由和答案. :P
### **(〃･ิ‿･ิ)ゞ鸿蒙内核开发者**
* 感谢开放原子开源基金会,致敬鸿蒙内核开发者提供了如此优秀的源码,一了多年的夙愿,津津乐道于此.精读内核源码当然是件很困难的事,时间上要以月甚至年为单位,但正因为很难才值得去做! 干困难事,必有所得. 专注聚焦,必有所获.
* 致敬内核开发者,从内核一行行的代码中能深深体会到开发者各中艰辛与坚持,及鸿蒙生态对未来的价值,可以毫不夸张的说鸿蒙内核源码可作为大学C语言,数据结构,操作系统,汇编语言 四门课程的教学项目.如此宝库,不深入研究实在是暴殄天物,于心不忍,注者坚信鸿蒙大势所趋,未来可期,是其坚定的追随者和传播者.
* 从内核一行行的代码中能深深感受到开发者各中艰辛与坚持,及鸿蒙生态对未来的价值,这些是张嘴就来的网络喷子们永远不能体会到的.可以毫不夸张的说鸿蒙内核源码可作为大学 **C语言**,**数据结构**,**操作系统**,**汇编语言**,**计算机组成原理** 五门课程的教学项目.如此宝库,不深入研究实在是暴殄天物,于心不忍,注者坚信鸿蒙大势所趋,未来可期,是其坚定的追随者和传播者.
### **加注方式是怎样的？**
* 因鸿蒙内核6W+代码量,本身只有较少的注释, 中文注解以不对原有代码侵入为前提,源码中所有英文部分都是原有注释,所有中文部分都是中文版的注释,尽量不去增加代码的行数,不破坏文件的结构,试图把知识讲透彻,注释多类似以下的方式:
在每个模块的.c文件开始位置先对模块功能做整体的介绍,例如异常接管模块注解如图所示:
在重要模块的.c文件开始位置先对模块功能做整体的介绍,例如异常接管模块注解如图所示:
![在这里插入图片描述](https://gitee.com/weharmony/docs/raw/master/pic/other/ycjg.png)
......@@ -47,7 +51,7 @@
注者认为理解内核可分三个层级:
* **普通概念映射级:** 这一级不涉及专业知识,用大众所熟知的公共认知就能听明白是个什么概念,也就是说用一个普通人都懂的概念去诠释或者映射一个他们从没听过的概念.说别人能听得懂的话这很重要!!! 一个没学过计算机知识的卖菜大妈就不可能知道内核的基本运作了吗? 不一定!,在系列篇中试图用 **[鸿蒙内核源码分析(总目录)之故事篇](https://my.oschina.net/weharmony)** 去引导这一层级的认知,希望能卷入更多的人来关注基础软件,尤其是那些资本大鳄,加大对基础软件的投入.
* **普通概念映射级:** 这一级不涉及专业知识,用大众所熟知的公共认知就能听明白是个什么概念,也就是说用一个普通人都懂的概念去诠释或者映射一个他们从没听过的概念.让陌生的知识点与大脑中烂熟于心的知识点建立多重链接,加深记忆.说别人能听得懂的话这很重要!!! 一个没学过计算机知识的卖菜大妈就不可能知道内核的基本运作了吗? 不一定!,在系列篇中试图用 **[鸿蒙内核源码分析(总目录)之故事篇](https://my.oschina.net/weharmony)** 去引导这一层级的认知,希望能卷入更多的人来关注基础软件,尤其是那些资本大鳄,加大对基础软件的投入.
* **专业概念抽象级:** 对抽象的专业逻辑概念具体化认知, 比如虚拟内存,老百姓是听不懂的,学过计算机的人都懂,具体怎么实现的很多人又都不懂了,但这并不妨碍成为一个优秀的上层应用程序员,因为虚拟内存已经被抽象出来,目的是要屏蔽上层对它的现实认知.试图用 **[鸿蒙内核源码分析(总目录)百篇博客](https://my.oschina.net/weharmony)** 去拆解那些已经被抽象出来的专业概念, 希望能卷入更多对内核感兴趣的应用软件人才流入基础软件生态, 应用软件咱们是无敌宇宙,但基础软件却很薄弱.
......@@ -55,7 +59,10 @@
## **百篇博客分析**
给 **[鸿蒙内核源码加注释](https://gitee.com/weharmony/kernel_liteos_a_note)** 过程中,整理出以下文章.
* 给 **[鸿蒙内核源码加注释](https://gitee.com/weharmony/kernel_liteos_a_note)** 过程中,整理出以下文章.内容多以 轻松口语化的故事,生活场景打比方,表格,图像 将尽可能多的内核知识点置入某种场景,具有画面感,形成多重联接路径,达到轻松记忆,甚至永久记忆的目的.
* 鸿蒙内核源码注解分析系列不仅是百度教条式的在说清楚一堆诘屈聱牙的概念,那没什么意思.更希望是让内核变得栩栩如生,倍感亲切.确实有难度,不自量力,但已经出发,回头已是不可能的了.:P
### **总目录**
* [(总目录) | 百万汉字注解 百篇博客分析 ](https://weharmony.gitee.io/总目录.html) **[< csdn](https://blog.csdn.net/kuangyufei) [ | oschina >](https://my.oschina.net/weharmony)**
......@@ -69,6 +76,8 @@
### **ARM架构**
* [(汇编汇总篇) | 鸿蒙所有的汇编代码都在这里 ](https://weharmony.gitee.io/汇编汇总篇.html) **[< csdn](https://blog.csdn.net/kuangyufei/article/details/114597179) [ | oschina >](https://my.oschina.net/weharmony/blog/4977924)**
* [(异常接管篇) | 社会很单纯,复杂的是人 ](https://weharmony.gitee.io/异常接管篇.html) **[< csdn](https://blog.csdn.net/kuangyufei/article/details/114438285) [ | oschina >](https://my.oschina.net/weharmony/blog/4973016)**
* [(寄存器篇) | arm 37个寄存器一网打尽,不再神秘 ](https://weharmony.gitee.io/寄存器篇.html) **[< csdn](https://blog.csdn.net/kuangyufei/article/details/114326994) [ | oschina >](https://my.oschina.net/weharmony/blog/4969487)**
......@@ -149,7 +158,7 @@
### **主流站点**
感谢 `oschina`，`csdn`，`华为开发者论坛`, `51cto`, `电子发烧友`，以及其他小伙伴通过自己的公众号对系列文章的转载和推荐，无以为报，唯有不断的深挖内核地基，输出更多文章，错漏之处请多见谅，会持续完善源码注解和文档内容，精雕细琢，尽全力打磨精品内容。
感谢 `oschina`，`csdn`，`华为开发者论坛`, `51cto`, `电子发烧友`，以及其他小伙伴对系列文章的转载和推荐，无以为报，唯有不断的深挖内核地基，输出更多内容，错漏之处请多见谅，会持续完善源码注解和文档内容，精雕细琢，尽全力打磨精品内容。
**文章输出站点:**
......@@ -190,14 +199,12 @@
* [新建 Issue](https://gitee.com/weharmony/kernel_liteos_a_note/issues)
### **喜欢就大方 点赞+关注+收藏 吧**
### **喜欢请大方 点赞+关注+收藏 吧**
各大站点搜 **"鸿蒙内核源码分析"** ,快速找到组织, 欢迎转载,请注明出处.
各大站点搜 **"鸿蒙内核源码分析"** .欢迎转载,请注明出处.
![公众号: 鸿蒙内核源码分析](https://gitee.com/weharmony/docs/raw/master/pic/other/so1so.png)
---
[进入 >> 百万汉字注解 百篇博客分析 精读鸿蒙源码 深挖地基工程](https://weharmony.gitee.io) **[< gitee ](https://gitee.com/weharmony/kernel_liteos_a_note)[| csdn](https://blog.csdn.net/kuangyufei) [ | oschina >](https://my.oschina.net/weharmony)**
百万汉字注解 >> 精读内核源码,中文注解分析, 深挖地基工程,大脑永久记忆,四大码仓每日同步更新[< gitee ](https://gitee.com/weharmony/kernel_liteos_a_note)[| github ](https://github.com/kuangyufei/kernel_liteos_a_note)[| csdn ](https://codechina.csdn.net/kuangyufei/kernel_liteos_a_note)[| coding >](https://weharmony.coding.net/public/harmony/kernel_liteos_a_note/git/files)
百篇博客分析 >> 故事说内核,问答式导读,生活式比喻,表格化说明,图形化展示,多站点每日同步更新[< oschina ](https://my.oschina.net/u/3751245/blog/4626852)[| csdn ](https://blog.csdn.net/kuangyufei/article/details/108727970)[| weharmony >](https://weharmony.gitee.io/)
\ No newline at end of file
arch/arm/arm/src/armv7a/cache.S
浏览文件 @ f1fac04a
/*
* Copyright (c) 2013-2019, Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "asm.h"
.fpu vfpv4
.arch armv7a
.macro DCACHE_LINE_SIZE, reg, tmp
mrc p15, 0, \tmp, c0, c0, 1
lsr \tmp, \tmp, #16
and \tmp, \tmp, #0xf
mov \reg, #4
mov \reg, \reg, lsl \tmp
.endm
FUNCTION(arm_inv_cache_range)
push {r2, r3}
DCACHE_LINE_SIZE r2, r3
sub r3, r2, #1
tst r0, r3
bic r0, r0, r3
mcrne p15, 0, r0, c7, c14, 1
tst r1, r3
bic r1, r1, r3
mcrne p15, 0, r1, c7, c14, 1
1:
mcr p15, 0, r0, c7, c6, 1
add r0, r0, r2
cmp r0, r1
blo 1b
dsb
pop {r2, r3}
mov pc, lr
FUNCTION(arm_clean_cache_range)
push {r2, r3}
DCACHE_LINE_SIZE r2, r3
sub r3, r2, #1
bic r0, r0, r3
1:
mcr p15, 0, r0, c7, c10, 1
add r0, r0, r2
cmp r0, r1
blo 1b
dsb
pop {r2, r3}
mov pc, lr
/*
* Copyright (c) 2013-2019, Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "asm.h"
.fpu vfpv4
.arch armv7a
.macro DCACHE_LINE_SIZE, reg, tmp
mrc p15, 0, \tmp, c0, c0, 1
lsr \tmp, \tmp, #16
and \tmp, \tmp, #0xf
mov \reg, #4
mov \reg, \reg, lsl \tmp
.endm
FUNCTION(arm_inv_cache_range)
push {r2, r3}
DCACHE_LINE_SIZE r2, r3
sub r3, r2, #1
tst r0, r3
bic r0, r0, r3
mcrne p15, 0, r0, c7, c14, 1
tst r1, r3
bic r1, r1, r3
mcrne p15, 0, r1, c7, c14, 1
1:
mcr p15, 0, r0, c7, c6, 1
add r0, r0, r2
cmp r0, r1
blo 1b
dsb
pop {r2, r3}
mov pc, lr
FUNCTION(arm_clean_cache_range) @清除缓存范围
push {r2, r3}
DCACHE_LINE_SIZE r2, r3
sub r3, r2, #1
bic r0, r0, r3
1:
mcr p15, 0, r0, c7, c10, 1
add r0, r0, r2
cmp r0, r1
blo 1b
dsb
pop {r2, r3}
mov pc, lr
arch/arm/arm/src/hw_user_put.S
浏览文件 @ f1fac04a
/*
* Copyright (c) 2013-2019, Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "asm.h"
.syntax unified
.arm
// errno_t _arm_put_user(void *dst, const void *src, size_t dstTypeLen, size_t srcTypeLen)
FUNCTION(_arm_put_user)
stmdb sp!, {r0, r1, r2, r3, lr}
cmp r2, #0
beq .Lget_user_return
cmp r2, r3
bne .Lget_user_err
cmp r2, #1
bhi .Lget_user_half
.Lget_user_byte:
0: ldrb r3, [r1], #0
1: strbt r3, [r0], #0
b .Lget_user_return
.Lget_user_half:
cmp r2, #2
bhi .Lget_user_word
2: ldrh r3, [r1], #0
3: strht r3, [r0], #0
b .Lget_user_return
.Lget_user_word:
cmp r2, #4
bhi .Lget_user_err
4: ldr r3, [r1], #0
5: strt r3, [r0], #0
.Lget_user_return:
ldmia sp!, {r0, r1, r2, r3, lr}
mov r0, 0
bx lr
.Lget_user_err:
ldmia sp!, {r0, r1, r2, r3, lr}
mov r0, #-14
bx lr
.pushsection __exc_table, "a"
.long 0b, .Lget_user_err
.long 1b, .Lget_user_err
.long 2b, .Lget_user_err
.long 3b, .Lget_user_err
.long 4b, .Lget_user_err
.long 5b, .Lget_user_err
.popsection
/*
* Copyright (c) 2013-2019, Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "asm.h"
.syntax unified
.arm
//将内核空间数据拷贝用户空间汇编实现
// errno_t _arm_put_user(void *dst, const void *src, size_t dstTypeLen, size_t srcTypeLen)
FUNCTION(_arm_put_user)
stmdb sp!, {r0, r1, r2, r3, lr}
cmp r2, #0
beq .Lget_user_return
cmp r2, r3
bne .Lget_user_err
cmp r2, #1
bhi .Lget_user_half
.Lget_user_byte:
0: ldrb r3, [r1], #0
1: strbt r3, [r0], #0
b .Lget_user_return
.Lget_user_half:
cmp r2, #2
bhi .Lget_user_word
2: ldrh r3, [r1], #0
3: strht r3, [r0], #0
b .Lget_user_return
.Lget_user_word:
cmp r2, #4
bhi .Lget_user_err
4: ldr r3, [r1], #0
5: strt r3, [r0], #0
.Lget_user_return:
ldmia sp!, {r0, r1, r2, r3, lr}
mov r0, 0
bx lr
.Lget_user_err:
ldmia sp!, {r0, r1, r2, r3, lr}
mov r0, #-14
bx lr
.pushsection __exc_table, "a"
.long 0b, .Lget_user_err
.long 1b, .Lget_user_err
.long 2b, .Lget_user_err
.long 3b, .Lget_user_err
.long 4b, .Lget_user_err
.long 5b, .Lget_user_err
.popsection
arch/arm/arm/src/los_dispatch.S
浏览文件 @ f1fac04a
......@@ -182,44 +182,44 @@ OsStartToRun:
* R0: new task
* R1: run task
*/
OsTaskSchedule: /*新老任务切换上下文*/
OsTaskSchedule: /*任务调度*/
MRS R2, CPSR /*MRS 指令用于将特殊寄存器(如 CPSR 和 SPSR)中的数据传递给通用寄存器，要读取特殊寄存器的数据只能使用 MRS 指令*/
STMFD SP!, {LR} /*返回地址入栈*/
STMFD SP!, {LR} /*为何返回地址要再次入栈 @note_why*/
/* jump sp */
SUB SP, SP, #4 /*SP=SP-4 减4是向低地址偏移4个字节的位置的地址，即堆栈的头部的地址*/
SUB SP, SP, #4 /**/
/* push r0-r12*/
STMFD SP!, {R0-R12} @将寄存器列表中的寄存器(R0-R12)压栈。
STMFD SP!, {R2} /*R2 入栈*/
/* 8 bytes stack align */
SUB SP, SP, #4 /*SP=SP-4*/
SUB SP, SP, #4 @栈对齐
/* save fpu registers */
PUSH_FPU_REGS R2 /*保存fpu寄存器*/
/* store sp on running task */
STR SP, [R1] @在运行的任务栈中保存SP
STR SP, [R1] @在运行的任务栈中保存SP,即runTask->stackPointer = sp
OsTaskContextLoad:
OsTaskContextLoad: @加载上下文
/* clear the flag of ldrex */ @LDREX 可从内存加载数据,如果物理地址有共享TLB属性，则LDREX会将该物理地址标记为由当前处理器独占访问，并且会清除该处理器对其他任何物理地址的任何独占访问标记。
CLREX @清除ldrex指令的标记
/* switch to new task's sp */
LDR SP, [R0] @从栈中取出任务
LDR SP, [R0] @ 即:sp = new task->stackPointer
/* restore fpu registers */
POP_FPU_REGS R2 @恢复fpu寄存器,这里用了汇编宏R2是宏的参数
/* 8 bytes stack align */
ADD SP, SP, #4 /*SP=SP+4*/
ADD SP, SP, #4 @栈对齐
LDMFD SP!, {R0} @将堆栈内容出栈保存到寄存器R0
MOV R4, R0 @R4=R0 说明R4也记录了CPSR内容,这个内容将用于 OsKernelTaskLoad中保存到SPSR
AND R0, R0, #CPSR_MASK_MODE @R0 =R0&CPSR_MASK_MODE ,目的是清除高16位
CMP R0, #CPSR_USER_MODE @比较R0是否为用户模式
BNE OsKernelTaskLoad @不相等则跳转到OsKernelTaskLoad执行,return回去了
CMP R0, #CPSR_USER_MODE @R0 和 用户模式比较
BNE OsKernelTaskLoad @非用户模式则跳转到OsKernelTaskLoad执行,跳出
#ifdef LOSCFG_KERNEL_SMP
#ifdef LOSCFG_KERNEL_SMP_LOCKDEP
......@@ -242,21 +242,21 @@ OsTaskContextLoad:
#endif
MVN R3, #CPSR_INT_DISABLE @按位取反 R3 = 0x3F
AND R4, R4, R3
AND R4, R4, R3 @使能中断
MSR SPSR_cxsf, R4 @修改spsr值
/* restore r0-r12, lr */
LDMFD SP!, {R0-R12}
LDMFD SP, {R13, R14}^
ADD SP, SP, #(2 * 4)
LDMFD SP!, {PC}^
LDMFD SP!, {R0-R12} @恢复寄存器值
LDMFD SP, {R13, R14}^ @恢复SP和LR的值,注意此时SP值已经变了,CPU换地方上班了.
ADD SP, SP, #(2 * 4)@sp = sp + 8
LDMFD SP!, {PC}^ @恢复PC寄存器值,如此一来 SP和PC都有了新值,完成了上下文切换.完美!
OsKernelTaskLoad: @内核任务的加载
MSR SPSR_cxsf, R4 @将R4保存到程序状态保存寄存器32位
MSR SPSR_cxsf, R4 @将R4整个写入到程序状态保存寄存器
/* restore r0-r12, lr */
LDMFD SP!, {R0-R12} @出栈,依次保存到 R0-R12,其实就是恢复现场
ADD SP, SP, #4 @sp=SP+4
LDMFD SP!, {LR, PC}^ @返回地址赋给pc指针
LDMFD SP!, {LR, PC}^ @返回地址赋给pc指针,直接跳出.
OsIrqHandler: @硬中断处理,此时已切换到硬中断栈
SUB LR, LR, #4
......
arch/arm/arm/src/los_hw_exc.S
浏览文件 @ f1fac04a
......@@ -147,11 +147,11 @@
.endm
#endif
@ Description: Stack-Protector Init
@ Description: Stack-Protector Init @初始化堆栈保护器
__stack_chk_guard_setup:
PUSH {FP, LR}
PUSH {FP, LR} @FP,LR入栈
BL OsRandomStackGuard
LDR R1, =__stack_chk_guard
LDR R1, =__stack_chk_guard @0xd00a0dff
MOV R3, R0
ORR R2, R3, #0X80000000
STR R2, [R1]
......@@ -221,9 +221,9 @@ OsKernelSVCHandler:
SUB SP, SP, #(4 * 2) @ user sp and lr
MOV R0, #OS_EXCEPT_SWI @ Set exception ID to OS_EXCEPT_SWI.
@ 设置异常ID为软中断
B _osExceptionSwi @ Branch to global exception handler.
@ 跳到软中断处理
@ Description: Prefectch abort exception handler
_osExceptPrefetchAbortHdl:
#ifdef LOSCFG_GDB
......@@ -368,34 +368,35 @@ _osExceptDispatch: @处理异常分发
_osExceptionSwi: @软中断的处理,系统调用就是由软中断实现的
MOV R1, SP @ The second argument to the exception
MRC P15, 0, R4, C0, C0, 5
@ 异常的第二个参数,第一个参数是R0
MRC P15, 0, R4, C0, C0, 5 @ R4获取当前cpu id
AND R4, R4, #MPIDR_CPUID_MASK @ Get Current cpu id
LSL R2, R4, #2
LSL R2, R4, #2 @(Logic Shift Left)逻辑左移指令 R2 = R4<<2 @note_why 没看明白这句话的含义
LDR R3, =g_curNestCount @ if(g_curNestCount > 0) dump to _osExceptionGetSP
ADD R3, R3, R2
LDR R4, [R3]
@将g_curNestCount的地址存入R3
ADD R3, R3, R2 @ R3 = R3 + R2
LDR R4, [R3] @R4 = *R3
CMP R4, #0
CMP R4, #0 @R4 和 0对比
BNE _osExceptionGetSP @不相等则跳转
@判断异常发生在任务堆栈或系统堆栈中
LDR R3, =g_intCount @ Judge the exception is occur in task stack or system stack
ADD R3, R3, R2
LDR R4, [R3]
CMP R4, #0 @ if (g_intCount[ArchCurrCpuid()] > 0)
BNE _osExceptionGetSP @ can not switch svc stack
@软中断的优先级要低于硬中断,这里判断是否有硬中断发生,有则需先处理硬中断
CMP R4, #0 @ if (g_intCount[ArchCurrCpuid()] > 0) 当前有中断要处理
BNE _osExceptionGetSP @ can not switch svc stack 无法切换到svc堆栈
@切换到统一异常堆栈(SVC栈)
EXC_SP_SET __svc_stack_top, OS_EXC_SVC_STACK_SIZE, R6, R7 @ Switch to unified exception stack.
ADD R4, R4, #1
STR R4, [R3]
_osExceptionGetSP:
MOV R2, R8 @ far
MOV R3, R9 @ fsr
MOV R2, R8 @ far 从CP15的c6获取
MOV R3, R9 @ fsr 从CP15的c5获取
LDR R5, =OsExcHandleEntry @ OsExcHandleEntry(UINT32 excType, ExcContext * excBufAddr)
BX R5 @LDR为加载指令把OsExcHandleEntry加载到R5寄存器，BX为带分支的跳转指令，再跳到R5执行
BX R5 @LDR为加载指令把OsExcHandleEntry的地址放入R5，BX为带分支的跳转指令,去执行OsExcHandleEntry
_OsExcReturn:
LDR R0, [SP, #(2 * 4)]
AND R0, R0, #CPSR_MASK_MODE
......
arch/arm/arm/src/startup/reset_vector_up.S
浏览文件 @ f1fac04a
......@@ -124,7 +124,7 @@ __exception_handlers:
/* Startup code which will get the machine into supervisor mode */
.global reset_vector
.type reset_vector,function
reset_vector: @重置异常向量表
reset_vector: @单核cpu时,鸿蒙开机代码
/* do some early cpu setup: i/d cache disable, mmu disabled */
mrc p15, 0, r0, c1, c0, 0
bic r0, #(1<<12)
......
zzz/git/push.sh
浏览文件 @ f1fac04a
git add -A
git commit -m '注解用户空间,内核空间的汇编拷贝代码
git commit -m '上下文切换汇编代码注解
百万汉字注解 + 百篇博客分析 => 挖透鸿蒙内核源码
https://weharmony.gitee.io
'
......
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