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/**
 * \file dnn/src/cuda/convolution_helper/layout.cuh
 * MegEngine is Licensed under the Apache License, Version 2.0 (the "License")
 *
 * Copyright (c) 2014-2021 Megvii Inc. All rights reserved.
 *
 * Unless required by applicable law or agreed to in writing,
 * software distributed under the License is distributed on an
 * "AS IS" BASIS, WITHOUT ARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 */
#pragma once
#include "src/cuda/utils.cuh"

namespace megdnn {
namespace cuda {
namespace convolution {

enum Format { CHWN4, CHWN16, NCHW4 };

template <Format format>
struct Layout;

template <>
struct Layout<Format::CHWN4> {
    static constexpr Format format = Format::CHWN4;
    int batch_stride;
    int channel_stride;
    int height_stride;
    int width_stride;

    __host__ __device__ __forceinline__ void init(const int batch,
                                                  const int /* channel */,
                                                  const int height,
                                                  const int width) {
        batch_stride = 4;
        channel_stride = height * width * batch * 4;
        height_stride = width * batch * 4;
        width_stride = batch * 4;
    }

    __device__ __forceinline__ size_t offset(const int batch, const int channel,
                                             const int height,
                                             const int width) {
        return batch * batch_stride + (channel >> 2) * channel_stride +
               height * height_stride + width * width_stride;
    }
};

template <>
struct Layout<Format::CHWN16> {
    static constexpr Format format = Format::CHWN16;
    int batch_stride;
    int channel_stride;
    int height_stride;
    int width_stride;

    __host__ __device__ __forceinline__ void init(const int batch,
                                                  const int /* channel */,
                                                  const int height,
                                                  const int width) {
        batch_stride = 16;
        channel_stride = height * width * batch * 16;
        height_stride = width * batch * 16;
        width_stride = batch * 16;
    }

    __device__ __forceinline__ size_t offset(const int batch, const int channel,
                                             const int height,
                                             const int width) {
        return batch * batch_stride + (channel >> 4) * channel_stride +
               height * height_stride + width * width_stride;
    }
};

template <>
struct Layout<Format::NCHW4> {
    static constexpr Format format = Format::NCHW4;
    int batch_stride;
    int channel_stride;
    int height_stride;
    int width_stride;

    __host__ __device__ __forceinline__ void init(const int /* batch */,
                                                  const int channel,
                                                  const int height,
                                                  const int width) {
        batch_stride = channel * height * width;
        channel_stride = height * width * 4;
        height_stride = width * 4;
        width_stride = 4;
    }

    __device__ __forceinline__ size_t offset(const int batch, const int channel,
                                             const int height,
                                             const int width) {
        return batch * batch_stride + (channel >> 2) * channel_stride +
               height * height_stride + width * width_stride;
    }
};

}  // namespace convolution
}  // namespace cuda
}  // namespace megdnn

// vim: ft=cpp syntax=cuda.doxygen foldmethod=marker foldmarker=f{{{,f}}}
