This module is based on Kunpeng chip and provides some performance-sensitive chip parameters for adjustment.

Build and install:
    make clean && make
    insmod prefetch_tuning.ko

There will be some files under /sys/class/misc/prefetch/
    policy: Prefetch policy, can be set to 0~15.
    read_unique: Whether to allow cross-numa access to cache. 0--allow 1--forbid.
    iocapacity_limit: Whether to limit the io capacity of cache. 0--unlimiet 1--limit.
    tag_rep_alg: Choose cache line algorithm. 0--random 1--drrip 2--plru 3--random.
    ramswap: Full or partial when doing ramswap. 1--partial 0--full.
    sqmerge: whether consecutive address access can occupy only one entry in the squeue to accelerate the merge process. 0--limit 1--merge.
    prefetch_drop_hha: Whether to merge a non-prefetch operation with the previous prefetch operation. 0--allow 1--limit. 
    prime_drop_mask: Enable prefetch to retry randomly. 0--disable 1--enable.
    sequence_opt: Whether change the L3T processing to serial mode when blocking. 0--limit 1--enable.
    bankintlv: Choose bank interleaving algorithm. 0--simple 1--complex. 
    prefetch_utl_ddr: The utilization of ddr that leads to the halving the threshold of prefetch. 0--less thean 1/2 1--1/2 2--3/4 3--almost full.
    prefetch_utl_ddr_en: Whether to allow the automatic threshold reduction according to the utilization of ddr. 0--forbid 1--allow.
    prefetch_utl_l3t: The utilization of l3t that leads to the halving the threshold of prefetch. 0--less thean 1/2 1--1/2 2--3/4 3--almost full.
    prefetch_utl_l3t_en: Whether to allow the automatic threshold reduction according to the utilization of l3t. 0--forbid 1--allow.
    prefetch_start_level: The number of missing addresses that leads to prefetch. 0--32 1--2 n-1--n, can be 0~31.
    totem_dual: Assign the number of totems in each socket. 0--1, 1--2.
    canum_sktvec: Vector configuration of chip, active high. Range form 0 to 255.
    skt1_tb_cavec: Vector configuration of L3T partition in Socket1 TotemB, active high. Range from 0 to 255.
    skt1_ta_cavec: Vector configuration of L3T partition in Socket1 TotemA, active high. Range from 0 to 255.
    skt0_tb_cavec: Vector configuration of L3T partition in Socket0 TotemB, active high. Range from 0 to 255.
    skt0_ta_cavec: Vector configuration of L3T partition in Socket0 TotemA, active high. Range from 0 to 255.
    skt3_tb_cavec: Vector configuration of L3T partition in Socket3 TotemB, active high. Range from 0 to 255.
    skt3_ta_cavec: Vector configuration of L3T partition in Socket3 TotemA, active high. Range from 0 to 255.
    skt2_tb_cavec: Vector configuration of L3T partition in Socket2 TotemB, active high. Range from 0 to 255.
    skt2_ta_cavec: Vector configuration of L3T partition in Socket2 TotemA, active high. Range from 0 to 255.
    rdmerge_upgrade_en: Whether to allow the RS to merge with the preceding ReadE. 0--disabl 1--allow.
    ddr_compress_opt_en: Optimization switch of support HHA compression access. 0--disable 1--enable.
    snpsleep_en: Whether to enable snp sleep. 0--disable 1--enable.
    prefetchtgt_en: Whether to enable the prefetchtgt. 0--disable 1--enable.
    cpu_pf_lqos_en: Whether to enable the prefetch operation delivered by the CPU to be forcibly processed as the lqos operation. 0--disable 1--enable.
    refillsize_com_ada_en: Whether to enable the auto-sensing of the size of the request sent to the HHA. If the size of the continuously received requests is 128 bytes or 64 bytes, the size of the prefetched request is automatically adjusted. 0--disable 1--enable adaptive size adjustment.
    refillsize_pre_ada_en: Whether to enable the adaptation of the size of the request sent to the HHA. If the size of the continuously received request is 128 bytes or 64 bytes, the size of the normal request is automatically adjusted. 0--disable 1--enable adaptive size adjustment.
    prefetch_overide_level: Initial coverage priority for an operation to enter the prefetch buffer. If the value is incorrect, the threshold is decreased by 1. If the value is correct, the threshold is increased by 1. If the value is 0, the prefetch rule needs to be replaced. range 0~15.
    prefetch_vague_en: Indicates whether to enable fuzzy match for prefetch. After the function is enabled, the prefetch summarizes the same 16 KB address rule. The four 4 KB address rules are the same and can be used together. 0--disable 1--enable.
    prefetch_core_en: Core prefetch enable; Bit 1 indicates that the core request needs to be prefetched. range 0~15.
    prefetch_match_en: Whether to enable the prefetch operation after the prefetch hit. 0--disable 1--enable.
    reg_ctrl_prefetch_drop: Prefetch operation discard enable. 0--disable 1--enable.
    reg_ctrl_dmcassign: DDR access address alignment enable. 0--The DDR read operation uses the wrap mode, and the address is 32-byte-aligned. The DDR write operation is always in INCR mode, and the address is aligned with the access boundary. 1--The DDR read operation is always in INCR mode, and the address is aligned with the access boundary. The DDR write operation is always in INCR mode, and the address is aligned with the access boundary.
    reg_ctrl_rdatabyp: DDR read data bypass memory enable in the HHA. 0--disable 1--The internal data of the HHA is bypassed, and the DDR read data can be transmitted quickly.
    reg_dir_replace_alg: Directory replacement algorithm configuration. 0--EDIR random+SDIR random 1--EDIR random+SDIR polling 2--EDIR PLRU+SDIR random 3--EDIR PLRU+SDIR polling
    prefetch_comb: Read operation and prefetchtgt merge enable. 0--The read operation can be merged with the fetchtgt operation. 1--The read operation and the fetchtgt merge operation are not allowed.
    reg_funcdis_comb: Whether to merge write operations whose size is less than 128 bytes. 0--enable 1--disables the merge function of the write operation.

Configuration example:
    echo 1 > /sys/class/misc/prefetch/read_unique