Format and specifications

prefetch_tuning.c → prefetch_mod.c

@@ -84,7 +84,7 @@ static ssize_t cache_store(struct device* dev,
 		struct device_attribute* attr, const char* buf, size_t count)
 {
     ssize_t ret;
-    int value;
+    int value = -1;
 
     ret = kstrtouint(buf, 0, &value);
     if (ret || (value != 0 && value != 1)) {
@@ -128,8 +128,8 @@ static ssize_t prefetch_store(struct device* dev,
 		struct device_attribute* attr, const char* buf, size_t count)
 {
 	ssize_t ret;
-	int policy;
-pr_debug("hello\n");
+	int policy = -1;
+    
     ret = kstrtouint(buf, 0, &policy);
     if (ret) {
 		pr_err("invalid input\n");
@@ -211,7 +211,6 @@ static int __init prefetch_init(void)
 {
 	int ret;
 	int cpu;
-pr_err("prefetch init enter.\n");
 	/* mask: initial a mask */
     if (!alloc_cpumask_var(&prefetch_cpumask_value, GFP_KERNEL)) {
         ret = -ENOMEM;
@@ -250,7 +249,6 @@ pr_err("prefetch init enter.\n");
         pr_err("misc register fail\n");
         goto err_misc_reg;
     }
-    pr_err("prefetch misc register.\n");
 
 	return 0;
 

prefetch_tuning.h → prefetch_mod.h

 #ifndef __PREFETCH_TUNING__
 #define __PREFETCH_TUNING__
 
-#define ENABLE 1
-#define DISABLE 0
+enum {
+    DISABLE=0,
+    ENABLE
+};
+
 #define CACHE_READUNIQ_OFFSET 40
 #define CACHE_READUNIQ_CTRL (1L << CACHE_READUNIQ_OFFSET)
 
 #ifdef CONFIG_ARCH_HISI
 typedef struct {
-	long cpuprefctrl_el1;
-	long adps_lld_ddr_el1;
-	long adpp_l1v_mop_el1;
-	long adps_lld_l3_el1;
+    long cpuprefctrl_el1;
+    long adps_lld_ddr_el1;
+    long adpp_l1v_mop_el1;
+    long adps_lld_l3_el1;
 } cfg_t;
 #else
 typedef long cfg_t;