diff --git a/CHANGES b/CHANGES index 53e4c9321989aaf184ebbd134cac449c1f053076..d7e012babb073a6ce247c2770f4526c5aec64d22 100644 --- a/CHANGES +++ b/CHANGES @@ -4,6 +4,9 @@ Changes between 0.9.4 and 0.9.5 [xx XXX 2000] + *) ./config recognizes MacOS X now. + [Andy Polyakov] + *) Bug fix for BN_div() when the first words of num and divsor are equal (it gave wrong results if (rem=(n1-q*d0)&BN_MASK2) < d0). [Ulf Möller] diff --git a/Configure b/Configure index 553d90e4bc4cccd6401b56c4110c6b26c480d6a3..6ce16f5fde810f78f2b611a020bed9380d5aadd3 100755 --- a/Configure +++ b/Configure @@ -314,6 +314,9 @@ my %table=( "OpenBSD", "gcc:-DTERMIOS -O3 -fomit-frame-pointer::(unknown)::BN_LLONG RC2_CHAR RC4_INDEX DES_UNROLL:::", "OpenBSD-mips","gcc:-O2 -DL_ENDIAN::(unknown):BN_LLONG MD2_CHAR RC4_INDEX RC4_CHAR DES_UNROLL DES_RISC2 DES_PTR BF_PTR::::", +##### MacOS X (a.k.a. Rhapsody) setup +"rhapsody-ppc-cc","cc:-O3 -DB_ENDIAN::(unknown)::BN_LLONG RC4_CHAR RC4_CHUNK DES_UNROLL BF_PTR:::", + ); my @WinTargets=qw(VC-NT VC-WIN32 VC-WIN16 VC-W31-16 VC-W31-32 VC-MSDOS BC-32 diff --git a/config b/config index 170ab6820a2e34c138f8bf85b833919e322cda5b..8752e2304de7cd3b100a8591570e411383be6fb5 100755 --- a/config +++ b/config @@ -187,6 +187,10 @@ case "${SYSTEM}:${RELEASE}:${VERSION}:${MACHINE}" in echo "i860-intel-osf1"; exit 0 ;; + Rhapsody:*) + echo "ppc-apple-rhapsody"; exit 0 + ;; + SunOS:5.*) echo "${MACHINE}-sun-solaris2"; exit 0 ;; @@ -395,6 +399,7 @@ case "$GUESSOS" in ;; mips-*-linux?) OUT="linux-mips" ;; ppc-*-linux2) OUT="linux-ppc" ;; + ppc-apple-rhapsody) OUT="rhapsody-ppc-cc" ;; sparc64-*-linux2) #Before we can uncomment following lines we have to wait at least #till 64-bit glibc for SPARC is operational:-( diff --git a/crypto/md32_common.h b/crypto/md32_common.h index a5b838442b398eb32ac7b901736fe50c850844de..9a6a27512f60f2e1d1950a3ed48bac0374d5a494 100644 --- a/crypto/md32_common.h +++ b/crypto/md32_common.h @@ -200,16 +200,16 @@ */ # if defined(__i386) # define ROTATE(a,n) ({ register unsigned int ret; \ - asm volatile ( \ + asm ( \ "roll %1,%0" \ : "=r"(ret) \ : "I"(n), "0"(a) \ : "cc"); \ ret; \ }) -# elif defined(__powerpc) +# elif defined(__powerpc) || defined(__ppc) # define ROTATE(a,n) ({ register unsigned int ret; \ - asm volatile ( \ + asm ( \ "rlwinm %0,%1,%2,0,31" \ : "=r"(ret) \ : "r"(a), "I"(n)); \ @@ -226,14 +226,14 @@ /* some GNU C inline assembler templates by */ # if defined(__i386) && !defined(I386_ONLY) # define BE_FETCH32(a) ({ register unsigned int l=(a);\ - asm volatile ( \ + asm ( \ "bswapl %0" \ : "=r"(l) : "0"(l)); \ l; \ }) # elif defined(__powerpc) # define LE_FETCH32(a) ({ register unsigned int l; \ - asm volatile ( \ + asm ( \ "lwbrx %0,0,%1" \ : "=r"(l) \ : "r"(a)); \ @@ -242,7 +242,7 @@ # elif defined(__sparc) && defined(ULTRASPARC) # define LE_FETCH32(a) ({ register unsigned int l; \ - asm volatile ( \ + asm ( \ "lda [%1]#ASI_PRIMARY_LITTLE,%0"\ : "=r"(l) \ : "r"(a)); \