/* * Copyright (c) 2006-2018, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes * 2018-11-16 bluebear233 first version */ #include #include "NuMicro.h" #include "drv_uart.h" #include "board.h" #ifdef __CC_ARM extern int Image$$RW_IRAM1$$ZI$$Limit; #elif __ICCARM__ #pragma section="HEAP" #else extern int __bss_end; extern int __ram_top; #endif /** * This function will initial Clock tree. */ static void clock_init(void) { /* Unlock protected registers */ SYS_UnlockReg(); SystemInit(); /* Set XT1_OUT(PF.2) and XT1_IN(PF.3) to input mode */ PF->MODE &= ~(GPIO_MODE_MODE2_Msk | GPIO_MODE_MODE3_Msk); /* Enable External XTAL (4~24 MHz) */ CLK_EnableXtalRC(CLK_PWRCTL_HXTEN_Msk); /* Waiting for 12MHz clock ready */ CLK_WaitClockReady( CLK_STATUS_HXTSTB_Msk); /* Switch HCLK clock source to HXT */ CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HXT,CLK_CLKDIV0_HCLK(1)); /* Set core clock as PLL_CLOCK from PLL */ CLK_SetCoreClock(FREQ_192MHZ); /* Set both PCLK0 and PCLK1 as HCLK/4 */ CLK->PCLKDIV = CLK_PCLKDIV_PCLK0DIV4 | CLK_PCLKDIV_PCLK1DIV4; SystemCoreClockUpdate(); /* Lock protected registers */ SYS_LockReg(); } /** * This function will initial M487 board. */ void rt_hw_board_init(void) { clock_init(); #ifdef RT_USING_HEAP #ifdef __CC_ARM rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)SRAM_END); #elif __ICCARM__ rt_system_heap_init(__segment_end("HEAP"), (void*)SRAM_END); #else /* init memory system */ rt_system_heap_init((void*)&__bss_end, (void*)&__ram_top); #endif #endif /* RT_USING_HEAP */ rt_hw_uart_init(); #ifdef RT_USING_CONSOLE rt_console_set_device(RT_CONSOLE_DEVICE_NAME); #endif SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND); NVIC_SetPriorityGrouping(7); #ifdef RT_USING_COMPONENTS_INIT rt_components_board_init(); #endif } /** * This is the timer interrupt service routine. * */ void SysTick_Handler(void) { /* enter interrupt */ rt_interrupt_enter(); rt_tick_increase(); /* leave interrupt */ rt_interrupt_leave(); } void rt_hw_cpu_reset(void) { SYS_UnlockReg(); SYS->IPRST0 |= SYS_IPRST0_CHIPRST_Msk; }