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前往新版Gitcode,体验更适合开发者的 AI 搜索 >>
提交
0d6e6735
编写于
6月 28, 2021
作者:
饶先宏
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
202106282152
上级
15881d8a
变更
7
展开全部
隐藏空白更改
内联
并排
Showing
7 changed file
with
817 addition
and
642 deletion
+817
-642
bignumber/src/bignumber.c
bignumber/src/bignumber.c
+33
-8
examples/terris/src/main.c
examples/terris/src/main.c
+7
-0
examples/terris/src/terris_main_module.c
examples/terris/src/terris_main_module.c
+718
-624
examples/terris/verilog/terris_ctrl.v
examples/terris/verilog/terris_ctrl.v
+21
-8
examples/terris/verilog/terris_main_asm.v
examples/terris/verilog/terris_main_asm.v
+13
-2
examples/testbignumber/testbignumber.c
examples/testbignumber/testbignumber.c
+8
-0
hdl4secell/src/hdl4se_binop.c
hdl4secell/src/hdl4se_binop.c
+17
-0
未找到文件。
bignumber/src/bignumber.c
浏览文件 @
0d6e6735
...
...
@@ -49,7 +49,11 @@
#define NOTIMPL printf("bignumber.c %d, %s is not implemented now\n", __LINE__, __FUNCTION__)
#define HDL4SEDEBUG 0
#define HDL4SEDEBUG 1
#if HDL4SEDEBUG
char
__debug_buf
[
60
];
#endif
#define CELL_WIDTH 32
#define CELL_MASK 0xffffffff
...
...
@@ -174,8 +178,8 @@ static int bigint_bn_SetWidth(HOBJECT object, int width)
}
sign
=
0
;
if
(
pobj
->
isunsigned
==
0
)
{
bc
=
pobj
->
width
/
CELL_WIDTH
;
sign
=
pobj
->
buf
[
bc
]
&
(
1
<<
((
pobj
->
width
-
1
)
&
(
CELL_WIDTH
-
1
)));
bc
=
(
pobj
->
width
-
1
)
/
CELL_WIDTH
;
sign
=
pobj
->
buf
[
bc
]
&
(
1
<<
((
pobj
->
width
-
1
)
%
(
CELL_WIDTH
-
1
)));
}
blen
=
(
width
+
CELL_WIDTH
-
1
)
/
CELL_WIDTH
;
...
...
@@ -416,8 +420,11 @@ static int bigint_bn_GetStr(HOBJECT object, int base, char* str, int buflen)
static
int
bigint_bn_AssignInt32
(
HOBJECT
object
,
int
value
)
{
int
i
;
sBigInteger
*
pobj
;
pobj
=
(
sBigInteger
*
)
objectThis
(
object
);
for
(
i
=
1
;
i
<
pobj
->
buflen
;
i
++
)
pobj
->
buf
[
i
]
=
0
;
pobj
->
buf
[
0
]
=
*
(
unsigned
int
*
)
&
value
;
if
(
pobj
->
isunsigned
==
-
1
)
pobj
->
isunsigned
=
0
;
...
...
@@ -427,8 +434,11 @@ static int bigint_bn_AssignInt32(HOBJECT object, int value)
static
int
bigint_bn_AssignInt64
(
HOBJECT
object
,
long
long
value
)
{
int
i
;
sBigInteger
*
pobj
;
pobj
=
(
sBigInteger
*
)
objectThis
(
object
);
for
(
i
=
2
;
i
<
pobj
->
buflen
;
i
++
)
pobj
->
buf
[
i
]
=
0
;
pobj
->
buf
[
0
]
=
(
*
(
unsigned
long
long
*
)(
&
value
))
&
CELL_MASK
;
pobj
->
buf
[
1
]
=
((
*
(
unsigned
long
long
*
)(
&
value
))
>>
CELL_WIDTH
)
&
CELL_MASK
;
if
(
pobj
->
isunsigned
==
-
1
)
...
...
@@ -439,8 +449,12 @@ static int bigint_bn_AssignInt64(HOBJECT object, long long value)
static
int
bigint_bn_AssignUint32
(
HOBJECT
object
,
unsigned
int
value
)
{
int
i
;
sBigInteger
*
pobj
;
pobj
=
(
sBigInteger
*
)
objectThis
(
object
);
for
(
i
=
1
;
i
<
pobj
->
buflen
;
i
++
)
pobj
->
buf
[
i
]
=
0
;
pobj
->
buf
[
0
]
=
*
(
unsigned
int
*
)
&
value
;
if
(
pobj
->
isunsigned
==
-
1
)
pobj
->
isunsigned
=
1
;
...
...
@@ -450,8 +464,11 @@ static int bigint_bn_AssignUint32(HOBJECT object, unsigned int value)
static
int
bigint_bn_AssignUint64
(
HOBJECT
object
,
unsigned
long
long
value
)
{
int
i
;
sBigInteger
*
pobj
;
pobj
=
(
sBigInteger
*
)
objectThis
(
object
);
for
(
i
=
2
;
i
<
pobj
->
buflen
;
i
++
)
pobj
->
buf
[
i
]
=
0
;
pobj
->
buf
[
0
]
=
(
*
(
unsigned
long
long
*
)(
&
value
))
&
CELL_MASK
;
pobj
->
buf
[
1
]
=
((
*
(
unsigned
long
long
*
)(
&
value
))
>>
CELL_WIDTH
)
&
CELL_MASK
;
if
(
pobj
->
isunsigned
==
-
1
)
...
...
@@ -1178,10 +1195,14 @@ static int bigint_bn_IsLT(HOBJECT object, HOBJECT src)
int
i
,
buflen
,
widthobj
,
widthsrc
,
width
,
isunsignedobj
,
isunsignedsrc
;
sBigInteger
*
pobj
,
*
psrc
;
pobj
=
objectThis
(
object
);
psrc
=
objectThis
(
src
);
sBigInteger
*
pobj
,
*
psrc
;
pobj
=
objectThis
(
object
);
psrc
=
objectThis
(
src
);
#if HDL4SEDEBUG
bigint_bn_GetStr
(
object
,
16
,
__debug_buf
,
sizeof
(
__debug_buf
));
bigint_bn_GetStr
(
src
,
16
,
__debug_buf
,
sizeof
(
__debug_buf
));
#endif
if
(
0
!=
objectQueryInterface
(
object
,
IID_BIGNUMBER
,
&
numobj
))
return
-
1
;
...
...
@@ -1202,6 +1223,10 @@ static int bigint_bn_IsLT(HOBJECT object, HOBJECT src)
numsub
=
bigintegerCreate
(
width
);
objectCall1
(
numsub
,
SetUnsigned
,
0
);
objectCall2
(
numsub
,
Sub
,
object
,
src
);
#if HDL4SEDEBUG
bigint_bn_GetStr
(
numsub
,
16
,
__debug_buf
,
sizeof
(
__debug_buf
));
bigint_bn_GetStr
(
object
,
16
,
__debug_buf
,
sizeof
(
__debug_buf
));
#endif
ret
=
objectCall0
(
numsub
,
IsNeg
);
retresult:
objectCall1
(
numobj
,
SetUnsigned
,
isunsignedobj
);
...
...
@@ -1313,7 +1338,7 @@ static int bigint_bn_IsNeg(HOBJECT object)
pobj
=
(
sBigInteger
*
)
objectThis
(
object
);
if
(
pobj
->
isunsigned
)
return
0
;
bc
=
pobj
->
width
/
CELL_WIDTH
;
bc
=
(
pobj
->
width
-
1
)
/
CELL_WIDTH
;
signpos
=
(
pobj
->
width
-
1
)
%
CELL_WIDTH
;
sign
=
pobj
->
buf
[
bc
]
&
(
1
<<
signpos
);
return
sign
?
1
:
0
;
...
...
examples/terris/src/main.c
浏览文件 @
0d6e6735
...
...
@@ -104,6 +104,13 @@ int main(int argc, char* argv[])
objectCall2
(
vcdfile
,
AddSignal
,
"/top/terrisctrl/ctrl/wireout_nextblock"
,
"out"
);
objectCall2
(
vcdfile
,
AddSignal
,
"/top/terrisctrl/ctrl/wireout_curposx"
,
"out"
);
objectCall2
(
vcdfile
,
AddSignal
,
"/top/terrisctrl/ctrl/wireout_curposy"
,
"out"
);
objectCall2
(
vcdfile
,
AddSignal
,
"/top/terrisctrl/ctrl/wireout_tick"
,
"out"
);
objectCall2
(
vcdfile
,
AddSignal
,
"/top/terrisctrl/ctrl/wireout_speed"
,
"out"
);
objectCall2
(
vcdfile
,
AddSignal
,
"/top/terrisctrl/ctrl/cur_key"
,
"out"
);
objectCall2
(
vcdfile
,
AddSignal
,
"/top/terrisctrl/ctrl/stateAfterCheckKey"
,
"out"
);
objectCall2
(
vcdfile
,
AddSignal
,
"/top/terrisctrl/ctrl/tickltspeed"
,
"out"
);
objectCall2
(
vcdfile
,
AddSignal
,
"/top/terrisctrl/ctrl/speedlttick"
,
"out"
);
objectCall2
(
vcdfile
,
AddSignal
,
"/top/terrisctrl/ctrl/wirein_state"
,
"out"
);
objectCall1
(
vcdfile
,
SetTopModule
,
topmodule
);
objectCall0
(
vcdfile
,
StartRecord
);
...
...
examples/terris/src/terris_main_module.c
浏览文件 @
0d6e6735
此差异已折叠。
点击以展开。
examples/terris/verilog/terris_ctrl.v
浏览文件 @
0d6e6735
...
...
@@ -139,16 +139,17 @@ module teris_ctrl
/* 状态在每个状态都可能要修改,因此对每个状态下的新状态都用一个变量表示,
然后根据当前状态进行多选一,得到下一个状态,即状态寄存器的输入。
*/
wire
[
3
:
0
]
stateAfterFlushToDisp
,
wire
[
3
:
0
]
stateAfterFlushToDisp
,
stateAfterCheckBlockCanSetTo
,
stateAfterCheckLine
,
stateAfterCheckKey
,
nextstate
;
hdl4se_mux8
#(
4
)
mux_nextstate
(
hdl4se_mux8
#(
4
)
mux_nextstate
(
wireout_state
,
wStateComplete
?
`ST_GENBLOCK
:
`ST_INIT
,
// 0: ST_INIT
stateAfterFlushToDisp
,
// 1: ST_FLUSHTODISP,
`ST_CHECKBLOCKCANSETTO
,
// 2: ST_CHECKKEY,
stateAfterCheckKey
,
// 2: ST_CHECKKEY,
stateAfterCheckBlockCanSetTo
,
// 3: ST_CHECKBLOCKCANSETTO,
wStateComplete
?
`ST_CHECKLINE
:
`ST_BLOCKWRITE
,
// 4: ST_BLOCKWRITE,
stateAfterCheckLine
,
// 5: ST_CHECKLINE,
...
...
@@ -156,12 +157,13 @@ module teris_ctrl
wStateComplete
?
`ST_FLUSHTODISP
:
`ST_GENBLOCK
,
// 7: ST_GENBLOCK
nextstate
);
assign
stateAfterFlushToDisp
=
(
wireout_curblock
==
64'h0
)
?
`ST_GENBLOCK
assign
stateAfterFlushToDisp
=
(
wireout_curblock
==
64'h0
)
?
`ST_GENBLOCK
:
(
wStateComplete
?
`ST_CHECKKEY
:
`ST_FLUSHTODISP
);
assign
stateAfterCheckBlockCanSetTo
=
wStateComplete
?
`ST_FLUSHTODISP
:
`ST_CHECKBLOCKCANSETTO
;
assign
stateAfterCheckLine
=
wStateComplete
?
(
(
bResult
<
`YCOUNT
)
?
`ST_COPYLINES
:
`ST_CHECKBLOCKCANSETTO
)
assign
stateAfterCheckBlockCanSetTo
=
wStateComplete
?
`ST_FLUSHTODISP
:
`ST_CHECKBLOCKCANSETTO
;
assign
stateAfterCheckLine
=
wStateComplete
?
(
(
bResult
<
`YCOUNT
)
?
`ST_COPYLINES
:
`ST_CHECKBLOCKCANSETTO
)
:
`ST_CHECKLINE
;
assign
stateAfterCheckKey
=
((
cur_key
==
0
)
&&
(
wireout_tick
<=
wireout_speed
))
?
`ST_CHECKKEY
:
`ST_CHECKBLOCKCANSETTO
;
/* 内部变量 */
/* 测试块 testx, testy, testid */
...
...
@@ -297,6 +299,12 @@ module teris_ctrl
wire
[
31
:
0
]
scorediv4
=
wireout_score
[
31
:
4
];
assign
wirein_speed
=
(
`MAXSPEED
>
scorediv4
)
?
(
`MAXSPEED
-
scorediv4
)
:
1
;
/* 计数器,计数器到达speed则自动下移一行,中间有键盘操作则计数器清零*/
wire
[
31
:
0
]
wirein_tick
,
wireout_tick
;
hdl4se_reg
#(
32
)
terris_tick
(
wClk
,
wirein_tick
,
wireout_tick
);
assign
wirein_tick
=
((
nwReset
==
0
)
||
(
cur_key
!=
0
)
||
(
wireout_state
!=
`ST_CHECKKEY
))
?
0
:
(
wireout_tick
+
1
);
/* 当前块位置:初始化为面板中间最上方,CHECKKEY,CHECKLINE状态后可能修改 */
wire
[
7
:
0
]
curposxAfterCheckKey
,
curposxAfterCheckLine
;
wire
[
7
:
0
]
wirein_curposx
,
wireout_curposx
;
...
...
@@ -316,7 +324,9 @@ module teris_ctrl
nextblockx
);
wire
[
7
:
0
]
curposyAfterCheckKey
,
curposyAfterCheckLine
;
assign
curposxAfterCheckLine
=
wireout_curposx
;
wire
[
7
:
0
]
curposyAfterCheckKey
,
curposyAfterCheckLine
,
curposyAfterCheckBlockCanSetTo
;
wire
[
7
:
0
]
wirein_curposy
,
wireout_curposy
;
hdl4se_reg
#(
8
)
terris_curposy
(
wClk
,
wirein_curposy
,
wireout_curposy
);
assign
wirein_curposy
=
wStateComplete
?
nextblocky
:
wireout_curposy
;
...
...
@@ -326,13 +336,16 @@ module teris_ctrl
8'd0
,
// 0: ST_INIT
(
wireout_curblock
==
64'b0
)
?
8'd0
:
wireout_curposy
,
// 1: ST_FLUSHTODISP,
curposyAfterCheckKey
,
// 2: ST_CHECKKEY,
wireout_curposy
,
// 3: ST_CHECKBLOCKCANSETTO,
curposyAfterCheckBlockCanSetTo
,
// 3: ST_CHECKBLOCKCANSETTO,
wireout_curposy
,
// 4: ST_BLOCKWRITE,
curposyAfterCheckLine
,
// 5: ST_CHECKLINE,
wireout_curposy
,
// 6: ST_COPYLINES
wireout_curposy
,
// 7: ST_GENBLOCK
nextblocky
);
assign
curposyAfterCheckKey
=
wireout_curposy
;
assign
curposyAfterCheckLine
=
wireout_curposy
;
assign
curposyAfterCheckBlockCanSetTo
=
(
(
wireout_testid
==
0
)
&&
(
bResult
!=
0
)
)
?
(
wireout_curposy
+
1
)
:
(
wireout_curposy
);
/* 当前块形状: INIT, CHECKKEY和CHECKLINE时会修改,其他状态保持 */
wire
[
63
:
0
]
curblockWhenFlushToDisp
,
curblockAfterCheckKey
,
curblockAfterCheckLine
;
...
...
examples/terris/verilog/terris_main_asm.v
浏览文件 @
0d6e6735
...
...
@@ -551,6 +551,7 @@ module teris_ctrl
wire
[
3
:
0
]
stateAfterFlushToDisp
;
wire
[
3
:
0
]
stateAfterCheckBlockCanSetTo
;
wire
[
3
:
0
]
stateAfterCheckLine
;
wire
[
3
:
0
]
stateAfterCheckKey
;
wire
[
3
:
0
]
nextstate
;
wire
[
7
:
0
]
wirein_testx
;
wire
[
7
:
0
]
wireout_testx
;
...
...
@@ -581,6 +582,8 @@ module teris_ctrl
wire
[
31
:
0
]
wirein_speed
;
wire
[
31
:
0
]
wireout_speed
;
wire
[
31
:
0
]
scorediv4
;
wire
[
31
:
0
]
wirein_tick
;
wire
[
31
:
0
]
wireout_tick
;
wire
[
7
:
0
]
curposxAfterCheckKey
;
wire
[
7
:
0
]
curposxAfterCheckLine
;
wire
[
7
:
0
]
wirein_curposx
;
...
...
@@ -588,6 +591,7 @@ module teris_ctrl
wire
[
7
:
0
]
nextblockx
;
wire
[
7
:
0
]
curposyAfterCheckKey
;
wire
[
7
:
0
]
curposyAfterCheckLine
;
wire
[
7
:
0
]
curposyAfterCheckBlockCanSetTo
;
wire
[
7
:
0
]
wirein_curposy
;
wire
[
7
:
0
]
wireout_curposy
;
wire
[
7
:
0
]
nextblocky
;
...
...
@@ -614,6 +618,7 @@ module teris_ctrl
assign
stateAfterFlushToDisp
=
(((
wireout_curblock
==
64'h0
))
?
(
7
)
:
(((
wStateComplete
)
?
(
2
)
:
(
1
))));
assign
stateAfterCheckBlockCanSetTo
=
((
wStateComplete
)
?
(
1
)
:
(
3
));
assign
stateAfterCheckLine
=
((
wStateComplete
)
?
((((
bResult
<
24
))
?
(
6
)
:
(
3
)))
:
(
5
));
assign
stateAfterCheckKey
=
((((
cur_key
==
0
)
&&
(
wireout_tick
<=
wireout_speed
)))
?
(
2
)
:
(
3
));
assign
wirein_startline
=
(((
wStateComplete
&&
(
bState
==
5
)))
?
(
bResult
)
:
(
wireout_startline
));
assign
wirein_testparam
=
(((
bState
==
2
))
?
(
cur_key
)
:
(
wireout_testparam
));
assign
wirein_score
=
((
wStateComplete
)
?
(
nextscore
)
:
(
wireout_score
));
...
...
@@ -622,8 +627,13 @@ module teris_ctrl
assign
wirein_level
=
((
wStateComplete
)
?
(
nextlevel
)
:
(
wireout_level
));
assign
levelAfterCheckLine
=
(((
wStateComplete
&&
(
bResult
>=
24
)))
?
((
wireout_level
+
wireout_checklinecount
))
:
(
wireout_level
));
assign
wirein_speed
=
(((
32'h7d0
>
scorediv4
))
?
((
32'd2000
-
scorediv4
))
:
(
1
));
assign
wirein_tick
=
((((
nwReset
==
0
)
||
((
cur_key
!=
0
)
||
(
wireout_state
!=
2
))))
?
(
0
)
:
((
wireout_tick
+
1
)));
assign
wirein_curposx
=
((
wStateComplete
)
?
(
nextblockx
)
:
(
wireout_curposx
));
assign
curposxAfterCheckLine
=
wireout_curposx
;
assign
wirein_curposy
=
((
wStateComplete
)
?
(
nextblocky
)
:
(
wireout_curposy
));
assign
curposyAfterCheckKey
=
wireout_curposy
;
assign
curposyAfterCheckLine
=
wireout_curposy
;
assign
curposyAfterCheckBlockCanSetTo
=
((((
wireout_testid
==
0
)
&&
(
bResult
!=
0
)))
?
((
wireout_curposy
+
1
))
:
(
wireout_curposy
));
assign
curblockWhenFlushToDisp
=
(((
wireout_curblock
==
64'b0
))
?
(
wireout_nextblock
)
:
(
wireout_curblock
));
assign
curblockAfterCheckKey
=
wireout_curblock
;
assign
curblockAfterCheckLine
=
wireout_curblock
;
...
...
@@ -639,7 +649,7 @@ module teris_ctrl
assign
cur_key
=
(((
wireout_key
==
bKeyData
))
?
(
0
)
:
(
bKeyData
));
hdl4se_bind2
#(
8
,
8
)
bindpos
(
outputx
,
outputy
,
bCurBlockPos
);
hdl4se_reg
#(
4
)
terris_ctrlstate
(
wClk
,
wirein_state
,
wireout_state
);
hdl4se_mux8
#(
4
)
mux_nextstate
(
wireout_state
,
((
wStateComplete
)
?
(
7
)
:
(
0
)),
stateAfterFlushToDisp
,
3
,
stateAfterCheckBlockCanSetTo
,
((
wStateComplete
)
?
(
5
)
:
(
4
))
hdl4se_mux8
#(
4
)
mux_nextstate
(
wireout_state
,
((
wStateComplete
)
?
(
7
)
:
(
0
)),
stateAfterFlushToDisp
,
stateAfterCheckKey
,
stateAfterCheckBlockCanSetTo
,
((
wStateComplete
)
?
(
5
)
:
(
4
))
,
stateAfterCheckLine
,
((
wStateComplete
)
?
(
5
)
:
(
6
)),
((
wStateComplete
)
?
(
1
)
:
(
7
)),
nextstate
);
hdl4se_reg
#(
8
)
reg_testx
(
wClk
,
wirein_testx
,
wireout_testx
);
hdl4se_mux8
#(
8
)
mux_textx
(
wireout_state
,
wireout_testx
,
wireout_testx
,
testxwencheckkey
,
wireout_testx
,
wireout_testx
...
...
@@ -664,11 +674,12 @@ module teris_ctrl
hdl4se_mux8
#(
32
)
mux_level
(
wireout_state
,
32'h0
,
wireout_level
,
wireout_level
,
wireout_level
,
wireout_level
,
levelAfterCheckLine
,
wireout_level
,
wireout_level
,
nextlevel
);
hdl4se_reg
#(
32
)
terris_speed
(
wClk
,
wirein_speed
,
wireout_speed
);
hdl4se_reg
#(
32
)
terris_tick
(
wClk
,
wirein_tick
,
wireout_tick
);
hdl4se_reg
#(
8
)
terris_curposx
(
wClk
,
wirein_curposx
,
wireout_curposx
);
hdl4se_mux8
#(
8
)
mux_blockx
(
wireout_state
,
8
,
(((
wireout_curblock
==
64'b0
))
?
(
8'd8
)
:
(
wireout_curposx
)),
curposxAfterCheckKey
,
wireout_curposx
,
wireout_curposx
,
curposxAfterCheckLine
,
wireout_curposx
,
wireout_curposx
,
nextblockx
);
hdl4se_reg
#(
8
)
terris_curposy
(
wClk
,
wirein_curposy
,
wireout_curposy
);
hdl4se_mux8
#(
8
)
mux_blocky
(
wireout_state
,
0
,
(((
wireout_curblock
==
64'b0
))
?
(
8'd0
)
:
(
wireout_curposy
)),
curposyAfterCheckKey
,
wireout_curposy
,
wireout_curposy
hdl4se_mux8
#(
8
)
mux_blocky
(
wireout_state
,
0
,
(((
wireout_curblock
==
64'b0
))
?
(
8'd0
)
:
(
wireout_curposy
)),
curposyAfterCheckKey
,
curposyAfterCheckBlockCanSetTo
,
wireout_curposy
,
curposyAfterCheckLine
,
wireout_curposy
,
wireout_curposy
,
nextblocky
);
hdl4se_reg
#(
64
)
terris_curblock
(
wClk
,
wirein_curblock
,
wireout_curblock
);
hdl4se_mux8
#(
64
)
mux_curblock
(
wireout_state
,
wireout_curblock
,
curblockWhenFlushToDisp
,
curblockAfterCheckKey
,
wireout_curblock
,
wireout_curblock
...
...
examples/testbignumber/testbignumber.c
浏览文件 @
0d6e6735
...
...
@@ -65,5 +65,13 @@ int main(int argc, char* argv[])
objectCall2
(
bignumber
,
SHR
,
bignumber
,
8
);
objectCall3
(
bignumber
,
GetStr
,
16
,
buf
,
256
);
printf
(
"n=%s
\n
"
,
buf
);
objectCall1
(
bignumber2
,
AssignInt32
,
10
);
objectCall1
(
bignumber
,
AssignInt32
,
0x7c4
);
if
(
objectCall1
(
bignumber2
,
IsLE
,
bignumber
))
{
printf
(
"Correct
\n
"
);
}
else
{
printf
(
"Error
\n
"
);
}
return
0
;
}
\ No newline at end of file
hdl4secell/src/hdl4se_binop.c
浏览文件 @
0d6e6735
...
...
@@ -44,6 +44,13 @@
#include "bignumber.h"
#include "hdl4secell.h"
#define HDL4SEDEBUG 1
#if HDL4SEDEBUG
char
__debug_buf
[
60
];
#endif
/*
#define BINOP_ADD 0
#define BINOP_SUB 1
...
...
@@ -301,10 +308,17 @@ static int hdl4se_binop_hdl4se_unit_GetValue(HOBJECT object, int index, int widt
objectCall1
(
pobj
->
out_data
,
AssignInt32
,
0
);
break
;
case
BINOP_LT
:
#if HDL4SEDEBUG
objectCall3
(
pobj
->
in_data
[
0
],
GetStr
,
16
,
__debug_buf
,
sizeof
(
__debug_buf
));
objectCall3
(
pobj
->
in_data
[
1
],
GetStr
,
16
,
__debug_buf
,
sizeof
(
__debug_buf
));
#endif
objectCall1
(
pobj
->
out_data
,
SetWidth
,
1
);
objectCall1
(
pobj
->
out_data
,
AssignInt32
,
0
);
if
(
objectCall1
(
pobj
->
in_data
[
0
],
IsLT
,
pobj
->
in_data
[
1
]))
objectCall1
(
pobj
->
out_data
,
AssignInt32
,
1
);
#if HDL4SEDEBUG
objectCall3
(
pobj
->
out_data
,
GetStr
,
16
,
__debug_buf
,
sizeof
(
__debug_buf
));
#endif
break
;
case
BINOP_LE
:
objectCall1
(
pobj
->
out_data
,
SetWidth
,
1
);
...
...
@@ -401,6 +415,9 @@ static int hdl4se_binop_hdl4se_unit_GetValue(HOBJECT object, int index, int widt
objectCall1
(
value
,
SetWidth
,
outputwidth
);
}
objectCall1
(
value
,
Assign
,
pobj
->
out_data
);
#if HDL4SEDEBUG
objectCall3
(
value
,
GetStr
,
16
,
__debug_buf
,
sizeof
(
__debug_buf
));
#endif
return
0
;
}
...
...
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