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    x86/speculation: Add Special Register Buffer Data Sampling (SRBDS) mitigation · 7e5b3c26
    Mark Gross 提交于
    SRBDS is an MDS-like speculative side channel that can leak bits from the
    random number generator (RNG) across cores and threads. New microcode
    serializes the processor access during the execution of RDRAND and
    RDSEED. This ensures that the shared buffer is overwritten before it is
    released for reuse.
    
    While it is present on all affected CPU models, the microcode mitigation
    is not needed on models that enumerate ARCH_CAPABILITIES[MDS_NO] in the
    cases where TSX is not supported or has been disabled with TSX_CTRL.
    
    The mitigation is activated by default on affected processors and it
    increases latency for RDRAND and RDSEED instructions. Among other
    effects this will reduce throughput from /dev/urandom.
    
    * Enable administrator to configure the mitigation off when desired using
      either mitigations=off or srbds=off.
    
    * Export vulnerability status via sysfs
    
    * Rename file-scoped macros to apply for non-whitelist table initializations.
    
     [ bp: Massage,
       - s/VULNBL_INTEL_STEPPING/VULNBL_INTEL_STEPPINGS/g,
       - do not read arch cap MSR a second time in tsx_fused_off() - just pass it in,
       - flip check in cpu_set_bug_bits() to save an indentation level,
       - reflow comments.
       jpoimboe: s/Mitigated/Mitigation/ in user-visible strings
       tglx: Dropped the fused off magic for now
     ]
    Signed-off-by: NMark Gross <mgross@linux.intel.com>
    Signed-off-by: NBorislav Petkov <bp@suse.de>
    Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
    Reviewed-by: NTony Luck <tony.luck@intel.com>
    Reviewed-by: NPawan Gupta <pawan.kumar.gupta@linux.intel.com>
    Reviewed-by: NJosh Poimboeuf <jpoimboe@redhat.com>
    Tested-by: NNeelima Krishnan <neelima.krishnan@intel.com>
    7e5b3c26
cpu.h 2.5 KB