Merge pull request #5037 from Rbb666/master

添加ART-PI在rtthread主分支的bsp模板。

bsp/stm32/stm32h750-artpi-h750/applications/main.c

@@ -28,3 +28,12 @@ int main(void)
         rt_thread_mdelay(500);
     }
 }
+
+#include "stm32h7xx.h"
+static int vtor_config(void)
+{
+    /* Vector Table Relocation in Internal QSPI_FLASH */
+    SCB->VTOR = QSPI_BASE;
+    return 0;
+}
+INIT_BOARD_EXPORT(vtor_config);

bsp/stm32/stm32h750-artpi-h750/board/Kconfig

@@ -9,12 +9,12 @@ config SOC_STM32H750XB
 
 menu "Onboard Peripheral Drivers"
 
-    config BSP_USING_QSPI_FLASH
-        bool "Enable QSPI FLASH (W25Q64)"
-        select BSP_USING_QSPI
-        select RT_USING_SFUD
-        select RT_SFUD_USING_QSPI
+    config BSP_USING_USB_TO_USART
+        bool "Enable Debuger USART (uart4)"
+        select BSP_USING_UART
+        select BSP_USING_UART4
         default n
+
 endmenu
 
 menu "On-chip Peripheral Drivers"
@@ -26,27 +26,96 @@ menu "On-chip Peripheral Drivers"
 
     menuconfig BSP_USING_UART
         bool "Enable UART"
-        default y
+        default n
         select RT_USING_SERIAL
+        select RT_SERIAL_USING_DMA
         if BSP_USING_UART
+            config BSP_USING_UART1
+                bool "Enable UART1"
+                default n
+
+            config BSP_UART1_RX_USING_DMA
+                bool "Enable UART1 RX DMA"
+                depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
+                default n
+
+            config BSP_UART1_TX_USING_DMA
+                bool "Enable UART1 TX DMA"
+                depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
+                default n
+                
             config BSP_USING_UART3
                 bool "Enable UART3"
-                default y
-
+                default n
+                
             config BSP_USING_UART4
                 bool "Enable UART4"
-                default y
+                default n
+                
+            config BSP_USING_UART6
+                bool "Enable UART6"
+                default n
         endif
 
-
-
-    config BSP_USING_SDIO
-        bool "Enable SDIO"
-        select RT_USING_SDIO
-        select RT_USING_DFS
+    config BSP_USING_ONCHIP_RTC
+        bool "Enable Onchip RTC"
+        select RT_USING_RTC
         default n
 
-
+    menuconfig BSP_USING_I2C
+        bool "Enable I2C BUS (software simulation)"
+        select RT_USING_I2C
+        select RT_USING_I2C_BITOPS
+        select RT_USING_PIN
+        default n
+        if BSP_USING_I2C
+            menuconfig BSP_USING_I2C1
+                bool "Enable I2C1 BUS (software simulation)"
+                default n
+                select RT_USING_I2C
+                select RT_USING_I2C_BITOPS
+                select RT_USING_PIN
+                if BSP_USING_I2C1
+                    comment "Notice: PB6 --> 22; PB7 --> 23" 
+                    config BSP_I2C1_SCL_PIN
+                        int "I2C1 scl pin number"
+                        range 0 175
+                        default 22
+                    config BSP_I2C1_SDA_PIN
+                        int "I2C1 sda pin number"
+                        range 0 175
+                        default 23
+                endif
+            menuconfig BSP_USING_I2C2
+                bool "Enable I2C2 BUS (software simulation)"
+                default n
+                if BSP_USING_I2C2
+                    comment "Notice: PH13 --> 125; PH15 --> 127"
+                    config BSP_I2C2_SCL_PIN
+                        int "i2c2 scl pin number"
+                        range 1 176
+                        default 127
+                    config BSP_I2C2_SDA_PIN
+                        int "I2C2 sda pin number"
+                        range 0 175
+                        default 125
+                endif
+            menuconfig BSP_USING_I2C3
+                bool "Enable I2C3 BUS (software simulation)"
+                default n
+                if BSP_USING_I2C3
+                    comment "Notice: PH12 --> 124; PH11 --> 123"
+                    config BSP_I2C3_SCL_PIN
+                        int "i2c3 scl pin number"
+                        range 0 175
+                        default 123
+                    config BSP_I2C3_SDA_PIN
+                        int "I2C3 sda pin number"
+                        range 0 175
+                        default 124
+                endif
+        endif
+        
     source "../libraries/HAL_Drivers/Kconfig"
 
 endmenu

bsp/stm32/stm32h750-artpi-h750/board/board.c

 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -16,59 +16,95 @@
   */
 void SystemClock_Config(void)
 {
-  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
-  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
-  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+    RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+    RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+    RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
 
-  /** Supply configuration update enable
-  */
-  HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
-  /** Configure the main internal regulator output voltage
-  */
-  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
+    /** Supply configuration update enable
+    */
+    HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
+    /** Configure the main internal regulator output voltage
+    */
+    __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
 
-  while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
-  /** Initializes the RCC Oscillators according to the specified parameters
-  * in the RCC_OscInitTypeDef structure.
-  */
-  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
-  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
-  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
-  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
-  RCC_OscInitStruct.PLL.PLLM = 5;
-  RCC_OscInitStruct.PLL.PLLN = 192;
-  RCC_OscInitStruct.PLL.PLLP = 2;
-  RCC_OscInitStruct.PLL.PLLQ = 2;
-  RCC_OscInitStruct.PLL.PLLR = 2;
-  RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
-  RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
-  RCC_OscInitStruct.PLL.PLLFRACN = 0;
-  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /** Initializes the CPU, AHB and APB buses clocks
-  */
-  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
-                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
-                              |RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
-  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
-  RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
-  RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
-  RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
-  RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
-  RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
-  RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
+    while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
+
+    /** Initializes the RCC Oscillators according to the specified parameters
+    * in the RCC_OscInitTypeDef structure.
+    */
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+    RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+    RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+    RCC_OscInitStruct.PLL.PLLM = 5;
+    RCC_OscInitStruct.PLL.PLLN = 192;
+    RCC_OscInitStruct.PLL.PLLP = 2;
+    RCC_OscInitStruct.PLL.PLLQ = 2;
+    RCC_OscInitStruct.PLL.PLLR = 2;
+    RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
+    RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
+    RCC_OscInitStruct.PLL.PLLFRACN = 0;
+
+    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+    {
+        Error_Handler();
+    }
+
+    /** Initializes the CPU, AHB and APB buses clocks
+    */
+    RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+                                  | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2
+                                  | RCC_CLOCKTYPE_D3PCLK1 | RCC_CLOCKTYPE_D1PCLK1;
+    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+    RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
+    RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
+    RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
+    RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
+    RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
+    RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
+
+    if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+    {
+        Error_Handler();
+    }
+
+    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC | RCC_PERIPHCLK_USART3
+            | RCC_PERIPHCLK_UART4 | RCC_PERIPHCLK_SPI4
+            | RCC_PERIPHCLK_SPI1 | RCC_PERIPHCLK_SDMMC
+            | RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_USB
+            | RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_FMC;
+    PeriphClkInitStruct.PLL2.PLL2M = 2;
+    PeriphClkInitStruct.PLL2.PLL2N = 64;
+    PeriphClkInitStruct.PLL2.PLL2P = 2;
+    PeriphClkInitStruct.PLL2.PLL2Q = 2;
+    PeriphClkInitStruct.PLL2.PLL2R = 4;
+    PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_3;
+    PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOWIDE;
+    PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
+    PeriphClkInitStruct.PLL3.PLL3M = 5;
+    PeriphClkInitStruct.PLL3.PLL3N = 160;
+    PeriphClkInitStruct.PLL3.PLL3P = 8;
+    PeriphClkInitStruct.PLL3.PLL3Q = 8;
+    PeriphClkInitStruct.PLL3.PLL3R = 24;
+    PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3VCIRANGE_2;
+    PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3VCOWIDE;
+    PeriphClkInitStruct.PLL3.PLL3FRACN = 0;
+    PeriphClkInitStruct.FmcClockSelection = RCC_FMCCLKSOURCE_PLL2;
+    PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL2;
+    PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL2;
+    PeriphClkInitStruct.Spi45ClockSelection = RCC_SPI45CLKSOURCE_PLL3;
+    PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
+    PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
+    PeriphClkInitStruct.Lptim1ClockSelection = RCC_LPTIM1CLKSOURCE_LSI;
+    PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLL2;
+
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+    {
+        Error_Handler();
+    }
 
-  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3|RCC_PERIPHCLK_UART4;
-  PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
-  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
-  {
-    Error_Handler();
-  }
+    /** Enable USB Voltage detector
+    */
+    HAL_PWREx_EnableUSBVoltageDetector();
 }
 

bsp/stm32/stm32h750-artpi-h750/board/board.h

 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -20,12 +20,62 @@
 extern "C" {
 #endif
 
-#define STM32_FLASH_START_ADRESS     ((uint32_t)0x08000000)
-#define STM32_FLASH_SIZE             (128 * 1024)
-#define STM32_FLASH_END_ADDRESS      ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
+/*-------------------------- CHIP CONFIG BEGIN --------------------------*/
 
-#define STM32_SRAM_SIZE           (128)
-#define STM32_SRAM_END            (0x20000000 + STM32_SRAM_SIZE * 1024)
+#define CHIP_FAMILY_STM32
+#define CHIP_SERIES_STM32H7
+#define CHIP_NAME_STM32H750XBHX
+
+/*-------------------------- CHIP CONFIG END --------------------------*/
+
+/*-------------------------- ROM/RAM CONFIG BEGIN --------------------------*/
+ #define ROM_START              ((uint32_t)0x90000000)
+ #define ROM_SIZE               (16384)
+ #define ROM_END                ((uint32_t)(ROM_START + ROM_SIZE * 1024))
+
+#define RAM_START              (0x24000000)
+#define RAM_SIZE               (512)
+#define RAM_END                (RAM_START + RAM_SIZE * 1024)
+
+/*-------------------------- ROM/RAM CONFIG END --------------------------*/
+
+/*-------------------------- CLOCK CONFIG BEGIN --------------------------*/
+
+#define BSP_CLOCK_SOURCE                  ("HSE")
+#define BSP_CLOCK_SOURCE_FREQ_MHZ         ((int32_t)0)
+#define BSP_CLOCK_SYSTEM_FREQ_MHZ         ((int32_t)480)
+
+/*-------------------------- CLOCK CONFIG END --------------------------*/
+
+/*-------------------------- UART CONFIG BEGIN --------------------------*/
+
+/** After configuring corresponding UART or UART DMA, you can use it.
+ *
+ * STEP 1, define macro define related to the serial port opening based on the serial port number
+ *                 such as     #define BSP_USING_UATR1
+ *
+ * STEP 2, according to the corresponding pin of serial port, define the related serial port information macro
+ *                 such as     #define BSP_UART1_TX_PIN       "PA9"
+ *                             #define BSP_UART1_RX_PIN       "PA10"
+ *
+ * STEP 3, if you want using SERIAL DMA, you must open it in the RT-Thread Settings.
+ *                 RT-Thread Setting -> Components -> Device Drivers -> Serial Device Drivers -> Enable Serial DMA Mode
+ *
+ * STEP 4, according to serial port number to define serial port tx/rx DMA function in the board.h file
+ *                 such as     #define BSP_UART1_RX_USING_DMA
+ *
+ */
+#define STM32_FLASH_START_ADRESS       ROM_START
+#define STM32_FLASH_SIZE               ROM_SIZE
+#define STM32_FLASH_END_ADDRESS        ROM_END
+
+#define RAM_START              (0x24000000)
+#define RAM_SIZE               (512)
+#define RAM_END                (RAM_START + RAM_SIZE * 1024)
+
+#define STM32_SRAM1_SIZE               RAM_SIZE
+#define STM32_SRAM1_START              RAM_START
+#define STM32_SRAM1_END                RAM_END
 
 #if defined(__CC_ARM) || defined(__CLANG_ARM)
 extern int Image$$RW_IRAM1$$ZI$$Limit;
@@ -38,7 +88,7 @@ extern int __bss_end;
 #define HEAP_BEGIN      (&__bss_end)
 #endif
 
-#define HEAP_END        STM32_SRAM_END
+#define HEAP_END        STM32_SRAM1_END
 
 void SystemClock_Config(void);
 

bsp/stm32/stm32h750-artpi-h750/board/linker_scripts/link.sct

@@ -2,18 +2,16 @@
 ; *** Scatter-Loading Description File generated by uVision ***
 ; *************************************************************
 
-LR_IROM1 0x08000000 0x00020000  {    ; load region size_region
-  ER_IROM1 0x08000000 0x00020000  {  ; load address = execution address
+LR_IROM1 0x90000000 0x00800000  {    ; load region size_region
+  ER_IROM1 0x90000000 0x00800000  {  ; load address = execution address
    *.o (RESET, +First)
    *(InRoot$$Sections)
    .ANY (+RO)
    .ANY (+XO)
   }
-  RW_IRAM1 0x20000000 0x00020000  {  ; RW data
-   .ANY (+RW +ZI)
-  }
-  RW_IRAM2 0x24000000 0x00080000  {
+  RW_IRAM1 0x24000000 0x00080000  {  ; AXI SRAM 512K
    .ANY (+RW +ZI)
   }
 }
 
+