ROB: initialize interrupt_safe to true

src/main/scala/xiangshan/backend/rob/Rob.scala

@@ -316,7 +316,7 @@ class RobImp(outer: Rob)(implicit p: Parameters) extends LazyModuleImp(outer)
   val flagBkup = Reg(Vec(RobSize, Bool()))
   // some instructions are not allowed to trigger interrupts
   // They have side effects on the states of the processor before they write back
-  val interrupt_safe = RegInit(VecInit(Seq.fill(RobSize)(false.B)))
+  val interrupt_safe = RegInit(VecInit(Seq.fill(RobSize)(true.B)))
 
   // data for debug
   // Warn: debug_* prefix should not exist in generated verilog.